[coreboot-gerrit] Change in ...coreboot[master]: mb/google/octopus/casta: Tune usb2eye setting

[Seunghwan Kim (Code Review)]

Seunghwan Kim has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31359

Change subject: mb/google/octopus/casta: Tune usb2eye setting
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mb/google/octopus/casta: Tune usb2eye setting

It needs to tune usb2eye setting for these ports:
 USB2[4] - type-c port
 USB2[6] - camera

BUG=NONE
BRANCH=octopus
TEST=built and passed usb2eye SI test

Change-Id: Iaa3adaab2f391e95730b141dc0237ca62c459e5a
Signed-off-by: Seunghwan Kim 
---
M src/mainboard/google/octopus/variants/casta/overridetree.cb
1 file changed, 18 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/31359/1

diff --git a/src/mainboard/google/octopus/variants/casta/overridetree.cb b/src/mainboard/google/octopus/variants/casta/overridetree.cb
index d70a6ea..dc9c911 100644
--- a/src/mainboard/google/octopus/variants/casta/overridetree.cb
+++ b/src/mainboard/google/octopus/variants/casta/overridetree.cb
@@ -1,4 +1,22 @@
 chip soc/intel/apollolake
+	# Override USB2 PER PORT register (PORT 4)
+	register "usb2eye[4]" = "{
+		.Usb20OverrideEn = 1,
+		.Usb20PerPortPeTxiSet = 7,
+		.Usb20PerPortTxiSet = 3,
+		.Usb20IUsbTxEmphasisEn = 3,
+		.Usb20PerPortTxPeHalf = 0,
+	}"
+
+	# Override USB2 PER PORT register (PORT 6)
+	register "usb2eye[6]" = "{
+		.Usb20OverrideEn = 1,
+		.Usb20PerPortPeTxiSet = 3,
+		.Usb20PerPortTxiSet = 0,
+		.Usb20IUsbTxEmphasisEn = 3,
+		.Usb20PerPortTxPeHalf = 0,
+	}"
+
    # Intel Common SoC Config
    #+-------------------+---------------------------+
    #| Field             |  Value                    |