Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47221 )
Change subject: mb/purism/librem_mini: Fix PCIe clock source mapping in devicetree ......................................................................
Patch Set 1: Code-Review+1
(2 comments)
https://review.coreboot.org/c/coreboot/+/47221/1/src/mainboard/purism/librem... File src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/47221/1/src/mainboard/purism/librem... PS1, Line 198: or module not detected ... because SRCCLKREQ2 is not connected
https://review.coreboot.org/c/coreboot/+/47221/1/src/mainboard/purism/librem... PS1, Line 200: register "PcieClkSrcClkReq[2]" = "2" this can be dropped, because the SrcClkReq pins is NC