Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35170 )
Change subject: soc/skylake: Write the P2SB IBDF and HBDF registers in coreboot
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Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35170/3/src/soc/intel/skylake/bootb...
File src/soc/intel/skylake/bootblock/pch.c:
https://review.coreboot.org/c/coreboot/+/35170/3/src/soc/intel/skylake/bootb...
PS3, Line 59: pci_write_config16(PCH_DEV_P2SB, PCH_P2SB_HBDF, V_DEFAULT_HBDF);
FSP hides P2SB but recently a CB got merged unhiding it again after FSP-S, so this is not true any […]
Yep, definitely resolved (did I mark it as unresolved? :/) With "this" I meant "FSP hides the P2SB" - which is true, but we have a solution for it now :-)
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