Nitheesh Sekar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33160
Change subject: qcs405: Add board_id entry in the interface table ......................................................................
qcs405: Add board_id entry in the interface table
This patch adds board id entry in the interface table.
Change-Id: I2de11b6357db0eb2e1966aaf5069d002dc39a10e Signed-off-by: Nitheesh Sekar nsekar@codeaurora.org --- M src/mainboard/google/mistral/romstage.c M src/soc/qualcomm/common/include/soc/qclib_common.h M src/soc/qualcomm/qcs405/include/soc/memlayout.ld M src/soc/qualcomm/qcs405/include/soc/symbols.h M src/soc/qualcomm/qcs405/soc_blob_load.c 5 files changed, 11 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/33160/1
diff --git a/src/mainboard/google/mistral/romstage.c b/src/mainboard/google/mistral/romstage.c index bce258d..a21f6f3 100644 --- a/src/mainboard/google/mistral/romstage.c +++ b/src/mainboard/google/mistral/romstage.c @@ -16,6 +16,10 @@ #include <arch/stages.h> #include <soc/qclib.h> #include <soc/usb.h> +#include <symbols.h> +#include <soc/symbols.h> +#include <boardid.h> +
static void prepare_usb(void) { @@ -28,6 +32,7 @@
void platform_romstage_main(void) { + *_board_id = (uint8_t)board_id(); /* QCLib: DDR init & train */ qclib_load_and_run(); prepare_usb(); diff --git a/src/soc/qualcomm/common/include/soc/qclib_common.h b/src/soc/qualcomm/common/include/soc/qclib_common.h index 19ec083..834a6aa 100644 --- a/src/soc/qualcomm/common/include/soc/qclib_common.h +++ b/src/soc/qualcomm/common/include/soc/qclib_common.h @@ -36,6 +36,7 @@ #define QCLIB_TE_DDR_TRAINING_DATA "ddr_training_data" #define QCLIB_TE_LIMITS_CFG_DATA "limits_cfg_data" #define QCLIB_TE_QCSDI "qcsdi" +#define QCLIB_TE_BOARD_ID "board_id"
/* BA_BMASK_VALUES (blob_attributes bit mask values) */ #define QCLIB_BA_SAVE_TO_STORAGE 0x00000001 diff --git a/src/soc/qualcomm/qcs405/include/soc/memlayout.ld b/src/soc/qualcomm/qcs405/include/soc/memlayout.ld index 4505b11..2abb33e 100644 --- a/src/soc/qualcomm/qcs405/include/soc/memlayout.ld +++ b/src/soc/qualcomm/qcs405/include/soc/memlayout.ld @@ -54,6 +54,7 @@ REGION(ddr_training, 0x8cfe000, 0x2000, 0x1000) REGION(ddr_information, 0x8d00000, 0x100, 0x100) REGION(dcb, 0x8d01000, 0x1000, 0x1000) + REGION(board_id, 0x8d02000, 0x8, 0x10) REGION(qclib_shared_data, 0x8d78000, 0x8000, 0x1000) BSRAM_END(0x8D80000)
diff --git a/src/soc/qualcomm/qcs405/include/soc/symbols.h b/src/soc/qualcomm/qcs405/include/soc/symbols.h index c0e2dcf..d8b54ec 100644 --- a/src/soc/qualcomm/qcs405/include/soc/symbols.h +++ b/src/soc/qualcomm/qcs405/include/soc/symbols.h @@ -24,6 +24,7 @@ DECLARE_REGION(dram_reserved); DECLARE_REGION(dcb); DECLARE_REGION(pmic); +DECLARE_REGION(board_id);
extern u8 _rpm[]; extern u8 _erpm[]; diff --git a/src/soc/qualcomm/qcs405/soc_blob_load.c b/src/soc/qualcomm/qcs405/soc_blob_load.c index 67ef831..4519536 100644 --- a/src/soc/qualcomm/qcs405/soc_blob_load.c +++ b/src/soc/qualcomm/qcs405/soc_blob_load.c @@ -45,6 +45,9 @@
qclib_add_if_table_entry(QCLIB_TE_DCB_SETTINGS, _dcb, size, 0);
+ qclib_add_if_table_entry(QCLIB_TE_BOARD_ID, _board_id, + REGION_SIZE(board_id), 0); + return 0;
fail: