Patrick Georgi (pgeorgi@google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10813
-gerrit
commit 8d4b38e8b3c4b732046742331c3b92d418384193 Author: Patrick Georgi pgeorgi@chromium.org Date: Mon Jul 6 20:50:33 2015 +0200
sandybridge: provide monotonic timer function
This fixes building the ELOG_GSMI feature by using the TSC as time source for the flash drivers.
It's not the most precise clock, but should be good enough for the purpose.
Change-Id: I2d416c34268236228300a9e868628c35e22bf40c Signed-off-by: Patrick Georgi pgeorgi@chromium.org --- src/northbridge/intel/sandybridge/udelay.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)
diff --git a/src/northbridge/intel/sandybridge/udelay.c b/src/northbridge/intel/sandybridge/udelay.c index b150253..7c98380 100644 --- a/src/northbridge/intel/sandybridge/udelay.c +++ b/src/northbridge/intel/sandybridge/udelay.c @@ -53,3 +53,23 @@ void udelay(u32 us) } while ((tsc.hi < tsc1.hi) || ((tsc.hi == tsc1.hi) && (tsc.lo < tsc1.lo))); } + +#if CONFIG_LAPIC_MONOTONIC_TIMER && !defined(__PRE_RAM__) +#include <timer.h> + +void timer_monotonic_get(struct mono_time *mt) +{ + tsc_t tsc; + msr_t msr; + u32 fsb = 100, divisor; + u32 d; /* ticks per us */ + + msr = rdmsr(0xce); + divisor = (msr.lo >> 8) & 0xff; + d = fsb * divisor; /* On Core/Core2 this is divided by 4 */ + + tsc = rdtsc(); + + mt->microseconds = (long)((((uint64_t)tsc.hi << 32) | tsc.lo) / d); +} +#endif