[coreboot-gerrit] Patch merged into coreboot/master: 107b71c baytrail: reboot with EC in S0 with no MRC cache and EC in RW

the following patch was just integrated into master:
commit 107b71c3a3101c307acadb75c1e1e2f7b96c5015
Author: Aaron Durbin 
Date:   Thu Jan 9 14:35:41 2014 -0600

baytrail: reboot with EC in S0 with no MRC cache and EC in RW

This improves boot time in 2 ways for a firmware upgrade:

1. Normally MRC would detect the S0 state without an MRC cache
       even though it's told to the S5 path. When it observes this
       state a cold reset occurs. The cold reset stays in S5 for
       at least 4 seconds which is time observed by the end user.

2. As the EC was running RW code before the reset after firmware
       upgrade it will still be running the older RW code. Vboot will
       then reboot the EC and the whole system to put the EC into RO
       mode so it can handle the RW update.

The issues are mitigated by detecting the system is in S0 with
    no MRC cache and the EC isn't in RO mode. Therefore we can do the
    reboot without waiting the 4 secs and the EC is running RO so
    the 2nd reboot is not necessary.

BUG=chrome-os-partner:24133
    BRANCH=rambi,squawks
    TEST=Booted. Updated firmware while in OS. Rebooted. Noted the
         EC reboot before MRC execution.

Change-Id: I1c53d334a5e18c237a74ffbe96f263a7540cd8fe
    Signed-off-by: Aaron Durbin 
    Reviewed-on: https://chromium-review.googlesource.com/182061
    Reviewed-by: Duncan Laurie 
    Reviewed-on: http://review.coreboot.org/5040
    Tested-by: build bot (Jenkins)
    Reviewed-by: Kyösti Mälkki

See http://review.coreboot.org/5040 for details.

-gerrit