[coreboot-gerrit] Change in coreboot[master]: mb/intel/saddlebrook: Enable Chipset_lockdown coreboot config

[PraveenX Hodagatta Pranesh (Code Review)]

PraveenX Hodagatta Pranesh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36451 )

Change subject: mb/intel/saddlebrook: Enable Chipset_lockdown coreboot config
......................................................................

mb/intel/saddlebrook: Enable Chipset_lockdown coreboot config

This patch enables lockdown configuration for saddlebrook platform

BUG=None
TEST=Boot to Linux on saddlebrook and verified MRC is restored on warm, cold,
    resume boot path's.

Change-Id: Ia324c118b0c8e72b66a757dee5be43ba79abbeab
Signed-off-by: Praveen Hodagatta Pranesh 
---
M src/mainboard/intel/saddlebrook/devicetree.cb
1 file changed, 5 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/36451/1

diff --git a/src/mainboard/intel/saddlebrook/devicetree.cb b/src/mainboard/intel/saddlebrook/devicetree.cb
index 385a4be..f6727ef 100644
--- a/src/mainboard/intel/saddlebrook/devicetree.cb
+++ b/src/mainboard/intel/saddlebrook/devicetree.cb
@@ -61,6 +61,11 @@

register "serirq_mode" = "SERIRQ_CONTINUOUS"

+	# Lock Down
+	register "common_soc_config" = "{
+	.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
+	}"
+
    # VR Settings Configuration for 4 Domains
    #+----------------+-----------+-----------+-------------+----------+
    #| Domain/Setting |     SA    |    IA     | GT Unsliced |    GT    |