[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Add Legacy 8254 timer support

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39098 )

Change subject: soc/intel/tigerlake: Add Legacy 8254 timer support
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soc/intel/tigerlake: Add Legacy 8254 timer support

This patch overrides required FSP-S UPDs to enable 8254 timer
support for TGL.

TEST=Required to boot Tiano core payload.

Change-Id: Iaeff5c4b92691ed6ba7b71541ed4f947d5d299a8
Signed-off-by: Subrata Banik 
---
M src/soc/intel/tigerlake/fsp_params_tgl.c
1 file changed, 4 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/39098/1

diff --git a/src/soc/intel/tigerlake/fsp_params_tgl.c b/src/soc/intel/tigerlake/fsp_params_tgl.c
index 305748e..dbee489 100644
--- a/src/soc/intel/tigerlake/fsp_params_tgl.c
+++ b/src/soc/intel/tigerlake/fsp_params_tgl.c
@@ -135,6 +135,10 @@
    		sizeof(params->SataPortsDevSlp));
    }

+	/* Legacy 8254 timer support */
+	params->Enable8254ClockGating = !CONFIG_USE_LEGACY_8254_TIMER;
+	params->Enable8254ClockGatingOnS3 = 1;
+
    mainboard_silicon_init_params(params);
 }