Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39034 )
Change subject: soc/mediatek/mt8183: Correct EMI bandwidth threshold for DVFS switch
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Patch Set 5:
(3 comments)
https://review.coreboot.org/c/coreboot/+/39034/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/39034/1//COMMIT_MSG@12
PS1, Line 12:
D is 13,A is 10, this is threshold level of DVFS switch policy. […]
Ack
https://review.coreboot.org/c/coreboot/+/39034/1//COMMIT_MSG@15
PS1, Line 15: TEST=bootup pass
ditto
Ack
https://review.coreboot.org/c/coreboot/+/39034/4/src/soc/mediatek/mt8183/emi...
File src/soc/mediatek/mt8183/emi.c:
https://review.coreboot.org/c/coreboot/+/39034/4/src/soc/mediatek/mt8183/emi...
PS4, Line 305: 0x0a000705
the datasheet have mistake here, from the hardware design, BW_2ND_INT_BW_THR should be [30:24], not […]
Ack
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I82c3c70bcd90df3fdd613c0353aba0f176bc82bc
Gerrit-Change-Number: 39034
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