Marx Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40255 )
Change subject: soc/intel/apollolake: Disable XHCI LFPS power management ......................................................................
Patch Set 20:
(3 comments)
https://review.coreboot.org/c/coreboot/+/40255/19/src/soc/intel/apollolake/c... File src/soc/intel/apollolake/chip.h:
https://review.coreboot.org/c/coreboot/+/40255/19/src/soc/intel/apollolake/c... PS19, Line 189: * Default is 9 meaning periodic sampling interval is 9ms.
Default value... […]
yes, that's much better to describe it.
https://review.coreboot.org/c/coreboot/+/40255/19/src/soc/intel/apollolake/c... PS19, Line 193: */
Add a space to align this
Done
https://review.coreboot.org/c/coreboot/+/40255/19/src/soc/intel/apollolake/c... PS19, Line 194: uint8_t DisableXhciLfpsPM;
Maybe use `bool` instead? And since this is not a FSP UPD, I think we should use snake_case for it: […]
1. referring to other variables in "chip.h" such as "enable_vtd" which is also "uint8_t". i think to align it will be better? 2. yes, disable_xhci_lfps_pm is better as it's not FSP USD.