Brandon Breitenstein has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/51195 )
Change subject: mb/google/volteer: Configure tcss port information for early tcss init ......................................................................
mb/google/volteer: Configure tcss port information for early tcss init
Implement the mainboard_tcss_get_port_info weak function so that the TCSS muxes can be properly configured to disconnect mode during boot. This ensures that any devices that are connected during boot are not improperly configured by the Kernel.
BUG=b:180426950 BRANCH=firmare-volteer-13672.B TEST= Verified that the SOC code that initialized TCSS muxes to disconnect mode is executing properly for all TCSS ports and verified that USB3 devices are no longer downgrading to USB2 speed if connected during boot.
Change-Id: I59e5c5a7d2ab5ef5293abe6c59c3a585b25f7b75 Signed-off-by: Brandon Breitenstein brandon.breitenstein@intel.com --- M src/mainboard/google/volteer/Kconfig M src/mainboard/google/volteer/mainboard.c 2 files changed, 56 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/51195/1
diff --git a/src/mainboard/google/volteer/Kconfig b/src/mainboard/google/volteer/Kconfig index ddfd704..9603059 100644 --- a/src/mainboard/google/volteer/Kconfig +++ b/src/mainboard/google/volteer/Kconfig @@ -16,6 +16,7 @@ select DRIVERS_SOUNDWIRE_ALC5682 select DRIVERS_SOUNDWIRE_MAX98373 select DRIVERS_USB_ACPI + select EARLY_TCSS select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_BOARDID select EC_GOOGLE_CHROMEEC_SKUID diff --git a/src/mainboard/google/volteer/mainboard.c b/src/mainboard/google/volteer/mainboard.c index e8b3466..be6a92d 100644 --- a/src/mainboard/google/volteer/mainboard.c +++ b/src/mainboard/google/volteer/mainboard.c @@ -10,6 +10,7 @@ #include <gpio.h> #include <intelblocks/gpio.h> #include <security/tpm/tss.h> +#include <soc/early_tcss.h> #include <soc/gpio.h> #include <soc/pci_devs.h> #include <soc/ramstage.h> @@ -141,6 +142,60 @@ } }
+static bool is_correct_port(const struct device *dev, int port) +{ + return dev->path.type == DEVICE_PATH_GENERIC && dev->path.generic.id == port + && dev->chip_ops == &drivers_intel_pmc_mux_conn_ops; +} + +static const struct drivers_intel_pmc_mux_conn_config *get_connector_config(int port) +{ + const struct drivers_intel_pmc_mux_conn_config *config = NULL; + const struct device *pmc = NULL; + const struct device *mux = NULL; + DEVTREE_CONST struct device *conn = NULL; + + pmc = pcidev_path_on_root(PCH_DEVFN_PMC); + if (!pmc || !pmc->link_list->children) { + printk(BIOS_ERR, "%s: unable to find PMC device or its mux\n", __func__); + return NULL; + } + + + /* + * Find specified port underneath PMC.MUX; If the port is not found return and + * print out error statement. + */ + mux = pmc->link_list->children; + while ((conn = dev_bus_each_child(mux->link_list, conn)) != NULL) { + if (is_correct_port(conn, port)) + break; + } + + if (conn) + config = (const struct drivers_intel_pmc_mux_conn_config *) + conn->chip_info; + + return config; +} + +unsigned int mainboard_tcss_get_port_info(struct tcss_mux *mux_info) +{ + int port = 0; + const struct drivers_intel_pmc_mux_conn_config *mux_config; + while ((mux_config = get_connector_config(port)) != NULL) { + struct tcss_mux mux_data; + mux_data.usb2_port = mux_config->usb2_port_number; + mux_data.usb3_port = mux_config->usb3_port_number; + + mux_info[port] = mux_data; + port++; + } + + /* return port as number of ports */ + return port; +} + static void mainboard_chip_init(void *chip_info) { const struct pad_config *base_pads;