[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Update UART0 GPIO as per latest schematics

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47847 )

Change subject: soc/intel/alderlake: Update UART0 GPIO as per latest schematics
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Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47847/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/47847/2//COMMIT_MSG@7 
PS2, Line 7: latest schematics
Schematics for what? This is common SoC code, shouldn't this be dependent on the pinout for the SoC?