Hello Subrata Banik, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37196
to look at the new patch set (#5).
Change subject: [WIP]cpu/x86/cache: CLFLUSH programs to memory before running ......................................................................
[WIP]cpu/x86/cache: CLFLUSH programs to memory before running
When cbmem is initialized in romstage and postcar placed in the stage cache + cbmem where it is run, the assumption is made that this are all in UC memory such that calling invd in postcar is ok.
For performance reasons (e.g. postcar decompression) it is desirable to cache cbmem and the stage cache during romstage. Another reason is that AGESA sets up MTRR during romstage to cache all dram, which is currently worked around by using additional MTRR to make that UC.
TODO be nice to reviewers and spit some parts off.
TESTED on ASUS P5QL-EM on both regular and S3 resume bootpath.
Change-Id: I7ff2a57aee620908b71829457ea0f5a0c410ec5b Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/arch/x86/postcar_loader.c M src/cpu/x86/cache/Makefile.inc M src/cpu/x86/cache/cache.c M src/include/cpu/x86/cache.h 4 files changed, 74 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/37196/5