David Hendricks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34686 )
Change subject: src: Kconfig: Update config for default path ......................................................................
Patch Set 2: Code-Review-1
(4 comments)
Thanks for updating the default FSP and VGA BIOS paths. However, I think you should leave the IFD and microcode paths alone until we have paths within 3rdparty/blobs to use instead. Removing the options entirely will almost certainly break things.
https://review.coreboot.org/c/coreboot/+/34686/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34686/2//COMMIT_MSG@7 PS2, Line 7: src: Kconfig: Update config for default path This is too vague. How about: baytrail/rangeley: Update paths for FSP_FILE and VGA_BIOS_BIN
https://review.coreboot.org/c/coreboot/+/34686/2/src/cpu/intel/fsp_model_406... File src/cpu/intel/fsp_model_406dx/Kconfig:
https://review.coreboot.org/c/coreboot/+/34686/2/src/cpu/intel/fsp_model_406... PS2, Line 62: This will likely break things for users of this CPU. Please add the microcode header files to 3rdparty/blobs/cpu/intel/model_406dx/ and point there instead of removing this option.
https://review.coreboot.org/c/coreboot/+/34686/2/src/soc/intel/fsp_baytrail/... File src/soc/intel/fsp_baytrail/Kconfig:
https://review.coreboot.org/c/coreboot/+/34686/2/src/soc/intel/fsp_baytrail/... PS2, Line 104: Please add the microcode headers to 3rdparty/blobs/soc/intel/baytrail/ instead of removing this option all together.
https://review.coreboot.org/c/coreboot/+/34686/2/src/southbridge/intel/fsp_r... File src/southbridge/intel/fsp_rangeley/Kconfig:
https://review.coreboot.org/c/coreboot/+/34686/2/src/southbridge/intel/fsp_r... PS2, Line 51: This should probably be left alone until the mainboards which use Rangeley each have a default descriptor in 3rdparty/blobs/mainboard/