Attention is currently required from: Marc Jones, Nico Huber, Jonathan Zhang, Ryback Hung, Johnny Lin, Paul Menzel, Tim Wawrzynczak, Shuming Chu (Shuming).
Wilson Chou has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67264 )
Change subject: device: Clear lane error status ......................................................................
Patch Set 4:
(5 comments)
Patchset:
PS2:
Thanks. […]
No, it’s not suitable to implement that in pciexp_retrain_link() since common clock is hardware design and then some platform may choose separate clock instead.
File src/device/pciexp_device.c:
https://review.coreboot.org/c/coreboot/+/67264/comment/77894a36_f029019b PS2, Line 546: if (reg32 != 0) {
You can avoid the indentation with early returns, e.g. […]
Thanks for your advice.
https://review.coreboot.org/c/coreboot/+/67264/comment/730681bd_7c368092 PS2, Line 548: int bus_num, device_num; : bus_num = dev->bus->secondary; : device_num = dev->path.pci.devfn; : printk(BIOS_DEBUG, "bus = 0x%x dev = 0x%x\n", bus_num, device_num);
Please use dev_path().
Done
https://review.coreboot.org/c/coreboot/+/67264/comment/02e447e9_2bb4c02b PS2, Line 552: printk(BIOS_DEBUG, "pciexp_find_extended_cap = 0x%x\n", pos);
This is probably something to put inside pciexp_find_extended_cap(), if […]
I found that it's not necessary to print this, so I removed it.
File src/include/device/pci_def.h:
https://review.coreboot.org/c/coreboot/+/67264/comment/46076240_10076480 PS2, Line 465: #define PCI_EXT_CAP_ID_VNDR 0x0b
Please add a new define here. See /usr/include/pci/header.h for reference. […]
Done