Hello Julius Werner, build bot (Jenkins), Taniya Das,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38389
to look at the new patch set (#3).
Change subject: TEMP: sc7180: clock: Fix QUP DFSR configuration for perf levels ......................................................................
TEMP: sc7180: clock: Fix QUP DFSR configuration for perf levels
Update the QUP DFSR cmd to clear the SW control and also update the perf registers when M is set. While at it also update the d_2 values.
Tested: validated DFSR clock configuration and M/N/D values.
Change-Id: I6bba1c6f99810963aaa607885ef400c523c0e905 --- M src/soc/qualcomm/sc7180/clock.c M src/soc/qualcomm/sc7180/include/soc/clock.h 2 files changed, 9 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/38389/3