Kyösti Mälkki (kyosti.malkki@gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/2562
-gerrit
commit 9b978c883c62ce3dd6d359de39d0c3804d657de7 Author: Paul Menzel paulepanter@users.sourceforge.net Date: Fri Mar 1 13:05:04 2013 +0100
AMD CIMx SB800: late.c: Use variable `device` from for loop condition
Use the variable `device` instead of `dev` in the predicate of the if condition, as `dev` is not changed in the for loop.
The for loop was added in the following commit.
commit 8fed77ae4c46122859d0718678e54546e126d4bc Author: Scott Duplichan scott@notabs.org Date: Sat Jun 18 10:46:45 2011 -0500
ASRock E350M1: Configure SB800 GPP ports to support onboard pcie nic
Reviewed-on: http://review.coreboot.org/44
The assumption that the devices are ordered in the tree seem to hold in this case (although it is not ensured) and therefore at least with the ASRock E350M1 no (visible) change is experienced as the children are all of type `DEVICE_PATH_PCI`.
Change-Id: Iaa2fa13305dbe924965d27680cd02fe30c2f58a5 Signed-off-by: Paul Menzel paulepanter@users.sourceforge.net Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- src/southbridge/amd/cimx/sb800/late.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c index fa47a96..96cdf9a 100644 --- a/src/southbridge/amd/cimx/sb800/late.c +++ b/src/southbridge/amd/cimx/sb800/late.c @@ -413,9 +413,8 @@ static void sb800_enable(device_t dev) case (0x15 << 3) | 0: /* 0:15:0 PCIe PortA */ { device_t device; - for (device = dev; device; device = device->next) { - if (dev->path.type != DEVICE_PATH_PCI) continue; - if ((device->path.pci.devfn & ~7) != PCI_DEVFN(0x15,0)) break; + for (device = dev; device; device = device->sibling) { + if ((device->path.pci.devfn & ~3) != PCI_DEVFN(0x15,0)) break; sb_config->PORTCONFIG[device->path.pci.devfn & 3].PortCfg.PortPresent = device->enabled; }