[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/apollolake: Fix issue found by Coverity

[John Zhao (Code Review)]

John Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32903

Change subject: soc/intel/apollolake: Fix issue found by Coverity
......................................................................

soc/intel/apollolake: Fix issue found by Coverity

Function soc_init: Value stored to 'gnvs' is never read.
ACPI NVS in CBMEM allocation has been implemented in commom/acpi.
Remove the redundant cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnve)).

BRANCH=None
TEST=Built image successfully.

Signed-off-by: John Zhao 
Change-Id: Ie9421af4a556d1d88183aa938ee2a124a10ab727
---
M src/soc/intel/apollolake/chip.c
1 file changed, 0 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/32903/1

diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index f6880a7..ffe3ed1 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -44,7 +44,6 @@
 #include <soc/intel/common/vbt.h>
 #include <soc/iomap.h>
 #include <soc/itss.h>
-#include <soc/nvs.h>
 #include <soc/pci_devs.h>
 #include <soc/pm.h>
 #include <soc/systemagent.h>
@@ -389,8 +388,6 @@

static void soc_init(void *data)
 {
-	struct global_nvs_t *gnvs;
-
    /* Snapshot the current GPIO IRQ polarities. FSP is setting a
     * default policy that doesn't honor boards' requirements. */
    itss_snapshot_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END);
@@ -417,9 +414,6 @@
     */
    p2sb_unhide();

-	/* Allocate ACPI NVS in CBMEM */
-	gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
-
    /* Set RAPL MSR for Package power limits*/
    set_power_limits();