Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47502 )
Change subject: volteer/variants/eldrid: Goodix touch panel power-on sequence tuning ......................................................................
volteer/variants/eldrid: Goodix touch panel power-on sequence tuning
1. Enable panel stop GPIO in ramstage 2. generic.reset_delay_ms change to 30
BUG=b:171365316 Signed-off-by: Nick Chen nick_xr_chen@wistron.corp-partner.google.com Change-Id: I90ca39312252c668da6298183e598392bc9f9f28 Reviewed-on: https://review.coreboot.org/c/coreboot/+/47502 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Reviewed-by: Caveh Jalali caveh@chromium.org --- M src/mainboard/google/volteer/variants/eldrid/gpio.c M src/mainboard/google/volteer/variants/eldrid/overridetree.cb 2 files changed, 2 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Caveh Jalali: Looks good to me, but someone else must approve Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/mainboard/google/volteer/variants/eldrid/gpio.c b/src/mainboard/google/volteer/variants/eldrid/gpio.c index 3d627e3..24f80a0 100644 --- a/src/mainboard/google/volteer/variants/eldrid/gpio.c +++ b/src/mainboard/google/volteer/variants/eldrid/gpio.c @@ -80,7 +80,7 @@ /* E2 : SPI1_IO3 ==> WLAN_PCIE_WAKE_ODL */ PAD_CFG_GPI(GPP_E2, NONE, DEEP), /* E3 : CPU_GP0 ==> USI_REPORT_EN */ - PAD_CFG_GPO(GPP_E3, 1, DEEP), + PAD_CFG_GPO(GPP_E3, 0, DEEP), /* E4 : SATA_DEVSLP0 ==> M2_SSD_PE_WAKE_ODL */ PAD_CFG_GPI(GPP_E4, NONE, DEEP), /* E6 : THC0_SPI1_RST# ==> GPP_E6_STRAP */ diff --git a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb index f9ab7c9..72571c0 100644 --- a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb +++ b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb @@ -123,7 +123,7 @@ register "generic.probed" = "1" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C10)" - register "generic.reset_delay_ms" = "120" + register "generic.reset_delay_ms" = "30" register "generic.reset_off_delay_ms" = "3" register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)" register "generic.enable_delay_ms" = "12"