[coreboot-gerrit] Change in coreboot[master]: soc/amd/common/psp_verstage: Save transfer buffer during S0i3 resume

[Raul Rangel (Code Review)]

Attention is currently required from: Jason Glenesk, Marshall Dawson, Rob Barnes, Fred Reitberger, Karthik Ramasubramanian, Felix Held.
Hello build bot (Jenkins), Jason Glenesk, Marshall Dawson, Rob Barnes, Fred Reitberger, Karthik Ramasubramanian, Felix Held,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/62347

to look at the new patch set (#2).

Change subject: soc/amd/common/psp_verstage: Save transfer buffer during S0i3 resume
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soc/amd/common/psp_verstage: Save transfer buffer during S0i3 resume

We need to save the transfer buffer so we can transfer the cbmem
console and timestamps into x86 DRAM.

BUG=b:221231786
TEST=Boot guybrush and verify S0i3 resume works. Also dumped the
transfer buffer from the OS and verified the console contents got
transferred.

Signed-off-by: Raul E Rangel 
Change-Id: I1d3b34c90e0e18609b0c6a0cdedab35aeefbd84b
---
M src/soc/amd/common/psp_verstage/psp_verstage.c
1 file changed, 5 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/62347/2