Andrey Petrov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39108 )
Change subject: vendorcode/intel/fsp/fsp2_0: Add FSP header files for Skylake-SP ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39108/1/src/vendorcode/intel/fsp/fs... File src/vendorcode/intel/fsp/fsp2_0/skylake_sp/hob_iiouds.h:
https://review.coreboot.org/c/coreboot/+/39108/1/src/vendorcode/intel/fsp/fs... PS1, Line 169: typedef struct { : uint32_t FILLER_BUG; : // Current programmed CSI (or UPI) Link speed (Slow/Full speed mode) : uint8_t CurrentCsiLinkSpeed; : // Current requested CSI (or UPI) Link frequency (in GT) : uint8_t CurrentCsiLinkFrequency; : // output kti link enabled status for PM : uint32_t OutKtiPerLinkL1En[MAX_SOCKET]; : uint8_t IsocEnable; : // Size of the memory range requested by ME FW, in MB : uint32_t meRequestedSize; : uint8_t DmiVc1; : uint8_t DmiVcm; : uint32_t CpuPCPSInfo; : uint8_t MinimumCpuStepping; : uint8_t LtsxEnable; : uint8_t MctpEn; : uint8_t cpuType; : uint8_t cpuSubType; : uint8_t SystemRasType; : // 1,..4. Total number of CPU packages installed and detected (1..4)by QPI RC : uint8_t numCpus; : // Fused Core Mask in the package : uint32_t FusedCores[MAX_SOCKET]; : // Current activated core Mask in the package : uint32_t ActiveCores[MAX_SOCKET]; : // Package Max Non-turbo Ratio (per socket). : uint8_t MaxCoreToBusRatio[MAX_SOCKET]; : // Package Maximum Efficiency Ratio (per socket). : uint8_t MinCoreToBusRatio[MAX_SOCKET]; : uint8_t CurrentCoreToBusRatio; // Current system Core to Bus Ratio : // ISS Capable (system level) Bit[7:0] and current Config TDP Level Bit[15:8] : uint32_t IntelSpeedSelectCapable; : uint32_t IssConfigTdpLevelInfo; // get B2P CONFIG_TDP_GET_LEVELS_INFO : // get B2P CONFIG_TDP_GET_TDP_INFO : uint32_t IssConfigTdpTdpInfo[TDP_MAX_LEVEL]; : // get B2P CONFIG_TDP_GET_POWER_INFO : uint32_t IssConfigTdpPowerInfo[TDP_MAX_LEVEL]; : // get B2P CONFIG_TDP_GET_CORE_COUNT : uint8_t IssConfigTdpCoreCount[TDP_MAX_LEVEL]; : // bitmap of sockets with CPUs present detected by QPI RC : uint32_t socketPresentBitMap; : // bitmap of NID w/ fpga present detected by QPI RC : uint32_t FpgaPresentBitMap; : uint16_t tolmLimit; : uint32_t tohmLimit; : uint32_t mmCfgBase; : uint32_t RcVersion; : uint8_t DdrXoverMode; // DDR 2.2 Mode : // For RAS : uint8_t bootMode; : uint8_t OutClusterOnDieEn; // Whether RC enabled COD support : uint8_t OutSncEn; : uint8_t OutNumOfCluster; : uint8_t imcEnabled[MAX_SOCKET][MAX_IMC]; : uint8_t numChPerMC; : uint8_t maxCh; : uint8_t maxIMC; : uint16_t LlcSizeReg; : uint8_t chEnabled[MAX_SOCKET][MAX_CH]; : uint8_t mcId[MAX_SOCKET][MAX_CH]; : uint8_t memNode[MC_MAX_NODE]; : uint8_t IoDcMode; : uint8_t CpuAccSupport; : uint8_t SmbusErrorRecovery; : uint8_t AepDimmPresent; : } SYSTEM_STATUS;
this really looks like some structure internal to FSP that has fabricated into a HOB. […]
actually as Nate pointed out (offline) we already have standard ed2k hobs that communicate this information: HOB_TYPE_RESOURCE_DESCRIPTOR. I compiled with CONFIG_DISPLAY_HOBS and see tons of these. This is also how MinPlatform gets that information. So this may be used instead and we won't even need this HOB in the first place. Can we use that instead?