Attention is currently required from: Tarun Tuli, Sridhar Siricilla.
Dinesh Gehlot has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72416 )
Change subject: soc/intel/tgl: Move ME FSR structures to pertinent header ......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/72416/comment/0f9f2e58_8ba21081 PS3, Line 7: soc/intel/tgl: Move ME FSR structures to pertinent header
How much code size is expected by moving the only function (dump_me_status) to common code consideri […]
Yes, we may need to use SoC specfic Macro's to select the appropriate prints. These macros will be based on ME spec versions. For ex. ``` if we are merging alderlake(ADL) and meteorlake(MTL) ME source. ADL uses ME spec version 16.x whereas MTL uses 18.x. HFSR fields 'cpu_debug_disable' and 'txt_support' are under HFSR5 in 16.x but same fields are under HFSR6 under spec 18.x
In this particular case, we only need to move appearance of fields 'cpu_debug_disable' and 'txt_support' under relevant macros. Both board specific ME source file can be merged into single file and moved to common, with single set of #if/#elifs. ```