Hello Jes Klinke, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44084
to look at the new patch set (#2).
Change subject: soc/intel/common/block/gspi: Recalculate BAR after resource allocation ......................................................................
soc/intel/common/block/gspi: Recalculate BAR after resource allocation
The base address of the memory mapped I/O registers should not be cached across resource allocation. This CL will evict the cached value upon exiting the BS_DEV_RESOURCES stage.
See https://review.coreboot.org/c/coreboot/+/43741 for context.
Change-Id: I81f2b5bfadbf1aaa3b38cca2bcc44ce521666821 Signed-off-by: jbk@chromium.org --- M src/soc/intel/common/block/gspi/gspi.c 1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/44084/2