Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34603 )
Change subject: mainboard/asus: Add ASUS H110M-E/M.2 mainboard ......................................................................
Patch Set 50: Code-Review+1
(19 comments)
Patch Set 50:
So far the serial output of coreboot which leads to a blank display with a blinking cursor, https://pastebin.com/S9tLjhwb
Well well well... It seems to hang when writing the SIO global registers. As I commented on the devtree, just remove these writes. Hope this helps.
https://review.coreboot.org/c/coreboot/+/34603/47//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34603/47//COMMIT_MSG@9 PS47, Line 9: a variant of
Please undo the commit message change
Done
https://review.coreboot.org/c/coreboot/+/34603/46/Documentation/mainboard/as... File Documentation/mainboard/asus/h110m-e_m2.md:
https://review.coreboot.org/c/coreboot/+/34603/46/Documentation/mainboard/as... PS46, Line 44: output is not required:
to speed up the boot.
Done
https://review.coreboot.org/c/coreboot/+/34603/46/Documentation/mainboard/as... PS46, Line 73: an
Should fit on the line above.
Done
https://review.coreboot.org/c/coreboot/+/34603/49/Documentation/mainboard/in... File Documentation/mainboard/index.md:
https://review.coreboot.org/c/coreboot/+/34603/49/Documentation/mainboard/in... PS49, Line 11: - [H110M-E/M.2](asus/h110m-e_m2.md)
Looks like until this port gets working and approved, the index. […]
Just don't forget to add it. Leaving this comment unresolved as a reminder.
https://review.coreboot.org/c/coreboot/+/34603/50/src/mainboard/asus/h110m-e... File src/mainboard/asus/h110m-e_m2/Kconfig:
https://review.coreboot.org/c/coreboot/+/34603/50/src/mainboard/asus/h110m-e... PS50, Line 3: config BOARD_SPECIFIC_OPTIONS Missing Kconfig select for the LPC TPM on the devicetree
https://review.coreboot.org/c/coreboot/+/34603/50/src/mainboard/asus/h110m-e... File src/mainboard/asus/h110m-e_m2/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/34603/50/src/mainboard/asus/h110m-e... PS50, Line 19: Enable Nit: Disable
https://review.coreboot.org/c/coreboot/+/34603/50/src/mainboard/asus/h110m-e... PS50, Line 55: register "PchHdaVcType" = "Vc1"
https://review.coreboot.org/c/coreboot/+/34603/50/src/mainboard/asus/h110m-e... PS50, Line 107: 0x0 1520
https://review.coreboot.org/c/coreboot/+/34603/50/src/mainboard/asus/h110m-e... PS50, Line 120: 0x0 1520
https://review.coreboot.org/c/coreboot/+/34603/50/src/mainboard/asus/h110m-e... PS50, Line 133: 0x0 1520
https://review.coreboot.org/c/coreboot/+/34603/50/src/mainboard/asus/h110m-e... PS50, Line 146: 0x0 1520
https://review.coreboot.org/c/coreboot/+/34603/50/src/mainboard/asus/h110m-e... PS50, Line 187: [4] = 1, \ : [5] = 1, \ : [6] = 1, \ : [7] = 1, \ These are 0 for H110
https://review.coreboot.org/c/coreboot/+/34603/50/src/mainboard/asus/h110m-e... PS50, Line 203: # Enable CLKREQ# : register "PcieRpClkReqSupport[7]" = "1" : # Use SRCCLKREQ1# : register "PcieRpClkReqNumber[7]" = "1" Should not be needed and can be disabled
https://review.coreboot.org/c/coreboot/+/34603/50/src/mainboard/asus/h110m-e... PS50, Line 256: end These lone `end` words can go into the previous line
https://review.coreboot.org/c/coreboot/+/34603/50/src/mainboard/asus/h110m-e... PS50, Line 282: device pci 1c.4 off end # PCI Express Port 5 should be on
https://review.coreboot.org/c/coreboot/+/34603/50/src/mainboard/asus/h110m-e... PS50, Line 298: chip superio/nuvoton/nct5539d asrock/h110m now has some more code you might need.
https://review.coreboot.org/c/coreboot/+/34603/50/src/mainboard/asus/h110m-e... PS50, Line 301: rq 0x1c = 0x10 : irq 0x27 = 0x03 : irq 0x2a = 0xc0 Remove these writes. They are writing the default values, and coreboot hangs right when doing so.
https://review.coreboot.org/c/coreboot/+/34603/50/src/mainboard/asus/h110m-e... File src/mainboard/asus/h110m-e_m2/ramstage.c:
https://review.coreboot.org/c/coreboot/+/34603/50/src/mainboard/asus/h110m-e... PS50, Line 27: /* Enable Virtual Channel 1 */ : params->PchHdaVcType = 0x1; Should be set in the devicetree
https://review.coreboot.org/c/coreboot/+/34603/50/src/mainboard/asus/h110m-e... File src/mainboard/asus/h110m-e_m2/romstage.c:
PS50: asrock/h110m also fills DQ and DQS map data here. Maybe you need that too.