[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: Set controller state to active in GSPI init

[Meera Ravindranath (Code Review)]

Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34449 )

Change subject: soc/intel/common: Set controller state to active in GSPI init
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Patch Set 5:

(3 comments)

https://review.coreboot.org/c/coreboot/+/34449/3/src/soc/intel/common/block/... 
File src/soc/intel/common/block/gspi/gspi.c:

https://review.coreboot.org/c/coreboot/+/34449/3/src/soc/intel/common/block/... 
PS3, Line 474:
> do it here […]

Done

https://review.coreboot.org/c/coreboot/+/34449/3/src/soc/intel/common/block/... 
PS3, Line 479: lpss_set_power_state(device, STATE_D0);
> It will have to be done before any MMIO addresses are accessed i.e. […]

Done

https://review.coreboot.org/c/coreboot/+/34449/4/src/soc/intel/common/block/... 
File src/soc/intel/common/block/gspi/gspi.c:

https://review.coreboot.org/c/coreboot/+/34449/4/src/soc/intel/common/block/... 
PS4, Line 25: #include <intelblocks/gspi.h>
            : #include <intelblocks/spi.h>
            : #include <intelblocks/lpss.h>
> nit: can we align order

Done