Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31750 )
Change subject: device/pci_ops: Change ramstage PCI accessor signatures ......................................................................
device/pci_ops: Change ramstage PCI accessor signatures
This reduces parameter passing and visibility of parsing struct *dev to PCI bus:dev.fn.
Change-Id: Ie4232ca1db9cffdf21ed133143acfb7517577736 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/31750 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Aaron Durbin adurbin@chromium.org Reviewed-by: Nico Huber nico.h@gmx.de --- M src/arch/x86/pci_ops_conf1.c M src/device/pci_ops.c M src/device/pci_ops_mmconf.c M src/include/device/pci.h 4 files changed, 44 insertions(+), 50 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Aaron Durbin: Looks good to me, approved
diff --git a/src/arch/x86/pci_ops_conf1.c b/src/arch/x86/pci_ops_conf1.c index 1180a82..b1dadc3 100644 --- a/src/arch/x86/pci_ops_conf1.c +++ b/src/arch/x86/pci_ops_conf1.c @@ -19,50 +19,50 @@ */
#if !IS_ENABLED(CONFIG_PCI_IO_CFG_EXT) -#define CONF_CMD(bus, devfn, where) (0x80000000 | (bus << 16) | \ - (devfn << 8) | (where & ~3)) +#define CONF_CMD(dev, where) (0x80000000 | ((dev)->bus->secondary << 16) | \ + ((dev)->path.pci.devfn << 8) | (where & ~3)) #else -#define CONF_CMD(bus, devfn, where) (0x80000000 | (bus << 16) | \ - (devfn << 8) | ((where & 0xff) & ~3) |\ +#define CONF_CMD(dev, where) (0x80000000 | ((dev)->bus->secondary << 16) | \ + ((dev)->path.pci.devfn << 8) | ((where & 0xff) & ~3) |\ ((where & 0xf00)<<16)) #endif
-static uint8_t pci_conf1_read_config8(int bus, int devfn, int where) +static uint8_t pci_conf1_read_config8(struct device *dev, int where) { - outl(CONF_CMD(bus, devfn, where), 0xCF8); + outl(CONF_CMD(dev, where), 0xCF8); return inb(0xCFC + (where & 3)); }
-static uint16_t pci_conf1_read_config16(int bus, int devfn, int where) +static uint16_t pci_conf1_read_config16(struct device *dev, int where) { - outl(CONF_CMD(bus, devfn, where), 0xCF8); + outl(CONF_CMD(dev, where), 0xCF8); return inw(0xCFC + (where & 2)); }
-static uint32_t pci_conf1_read_config32(int bus, int devfn, int where) +static uint32_t pci_conf1_read_config32(struct device *dev, int where) { - outl(CONF_CMD(bus, devfn, where), 0xCF8); + outl(CONF_CMD(dev, where), 0xCF8); return inl(0xCFC); }
-static void pci_conf1_write_config8(int bus, int devfn, int where, +static void pci_conf1_write_config8(struct device *dev, int where, uint8_t value) { - outl(CONF_CMD(bus, devfn, where), 0xCF8); + outl(CONF_CMD(dev, where), 0xCF8); outb(value, 0xCFC + (where & 3)); }
-static void pci_conf1_write_config16(int bus, int devfn, int where, +static void pci_conf1_write_config16(struct device *dev, int where, uint16_t value) { - outl(CONF_CMD(bus, devfn, where), 0xCF8); + outl(CONF_CMD(dev, where), 0xCF8); outw(value, 0xCFC + (where & 2)); }
-static void pci_conf1_write_config32(int bus, int devfn, int where, +static void pci_conf1_write_config32(struct device *dev, int where, uint32_t value) { - outl(CONF_CMD(bus, devfn, where), 0xCF8); + outl(CONF_CMD(dev, where), 0xCF8); outl(value, 0xCFC); }
diff --git a/src/device/pci_ops.c b/src/device/pci_ops.c index 12c4e26..362a6ad 100644 --- a/src/device/pci_ops.c +++ b/src/device/pci_ops.c @@ -36,41 +36,35 @@ u8 pci_read_config8(struct device *dev, unsigned int where) { pcidev_assert(dev); - return pci_bus_ops()->read8(dev->bus->secondary, - dev->path.pci.devfn, where); + return pci_bus_ops()->read8(dev, where); }
u16 pci_read_config16(struct device *dev, unsigned int where) { pcidev_assert(dev); - return pci_bus_ops()->read16(dev->bus->secondary, - dev->path.pci.devfn, where); + return pci_bus_ops()->read16(dev, where); }
u32 pci_read_config32(struct device *dev, unsigned int where) { pcidev_assert(dev); - return pci_bus_ops()->read32(dev->bus->secondary, - dev->path.pci.devfn, where); + return pci_bus_ops()->read32(dev, where); }
void pci_write_config8(struct device *dev, unsigned int where, u8 val) { pcidev_assert(dev); - pci_bus_ops()->write8(dev->bus->secondary, - dev->path.pci.devfn, where, val); + pci_bus_ops()->write8(dev, where, val); }
void pci_write_config16(struct device *dev, unsigned int where, u16 val) { pcidev_assert(dev); - pci_bus_ops()->write16(dev->bus->secondary, - dev->path.pci.devfn, where, val); + pci_bus_ops()->write16(dev, where, val); }
void pci_write_config32(struct device *dev, unsigned int where, u32 val) { pcidev_assert(dev); - pci_bus_ops()->write32(dev->bus->secondary, - dev->path.pci.devfn, where, val); + pci_bus_ops()->write32(dev, where, val); } diff --git a/src/device/pci_ops_mmconf.c b/src/device/pci_ops_mmconf.c index d1f285f..9b03068 100644 --- a/src/device/pci_ops_mmconf.c +++ b/src/device/pci_ops_mmconf.c @@ -23,43 +23,43 @@ * Functions for accessing PCI configuration space with mmconf accesses */
-#define PCI_MMIO_ADDR(SEGBUS, DEVFN, WHERE, MASK) \ +#define PCI_MMIO_ADDR(dev, where, mask) \ ((void *)(((uintptr_t)CONFIG_MMCONF_BASE_ADDRESS |\ - (((SEGBUS) & 0xFFF) << 20) |\ - (((DEVFN) & 0xFF) << 12) |\ - ((WHERE) & 0xFFF)) & ~MASK)) + (((dev)->bus->secondary & 0xFFF) << 20) |\ + (((dev)->path.pci.devfn & 0xFF) << 12) |\ + ((where) & 0xFFF)) & ~mask))
-static uint8_t pci_mmconf_read_config8(int bus, int devfn, int where) +static uint8_t pci_mmconf_read_config8(struct device *dev, int where) { - return read8(PCI_MMIO_ADDR(bus, devfn, where, 0)); + return read8(PCI_MMIO_ADDR(dev, where, 0)); }
-static uint16_t pci_mmconf_read_config16(int bus, int devfn, int where) +static uint16_t pci_mmconf_read_config16(struct device *dev, int where) { - return read16(PCI_MMIO_ADDR(bus, devfn, where, 1)); + return read16(PCI_MMIO_ADDR(dev, where, 1)); }
-static uint32_t pci_mmconf_read_config32(int bus, int devfn, int where) +static uint32_t pci_mmconf_read_config32(struct device *dev, int where) { - return read32(PCI_MMIO_ADDR(bus, devfn, where, 3)); + return read32(PCI_MMIO_ADDR(dev, where, 3)); }
-static void pci_mmconf_write_config8(int bus, int devfn, int where, +static void pci_mmconf_write_config8(struct device *dev, int where, uint8_t value) { - write8(PCI_MMIO_ADDR(bus, devfn, where, 0), value); + write8(PCI_MMIO_ADDR(dev, where, 0), value); }
-static void pci_mmconf_write_config16(int bus, int devfn, int where, +static void pci_mmconf_write_config16(struct device *dev, int where, uint16_t value) { - write16(PCI_MMIO_ADDR(bus, devfn, where, 1), value); + write16(PCI_MMIO_ADDR(dev, where, 1), value); }
-static void pci_mmconf_write_config32(int bus, int devfn, int where, +static void pci_mmconf_write_config32(struct device *dev, int where, uint32_t value) { - write32(PCI_MMIO_ADDR(bus, devfn, where, 3), value); + write32(PCI_MMIO_ADDR(dev, where, 3), value); }
static const struct pci_bus_operations pci_ops_mmconf = { diff --git a/src/include/device/pci.h b/src/include/device/pci.h index a4f6536..c1aea43 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -35,12 +35,12 @@
/* Common pci bus operations */ struct pci_bus_operations { - uint8_t (*read8)(int bus, int devfn, int where); - uint16_t (*read16)(int bus, int devfn, int where); - uint32_t (*read32)(int bus, int devfn, int where); - void (*write8)(int bus, int devfn, int where, uint8_t val); - void (*write16)(int bus, int devfn, int where, uint16_t val); - void (*write32)(int bus, int devfn, int where, uint32_t val); + uint8_t (*read8)(struct device *dev, int where); + uint16_t (*read16)(struct device *dev, int where); + uint32_t (*read32)(struct device *dev, int where); + void (*write8)(struct device *dev, int where, uint8_t val); + void (*write16)(struct device *dev, int where, uint16_t val); + void (*write32)(struct device *dev, int where, uint32_t val); };
struct pci_driver {