[coreboot-gerrit] Change in coreboot[master]: mb/asus/kfsn4-dre: Use common pnp_{enter, exit} functions

[Elyes HAOUAS (Code Review)]

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/27867

Change subject: mb/asus/kfsn4-dre: Use common pnp_{enter,exit} functions
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mb/asus/kfsn4-dre: Use common pnp_{enter,exit} functions

Change-Id: I4b0577bf3c00307733a1096749c1835d86764f29
Signed-off-by: Elyes HAOUAS 
---
M src/mainboard/asus/kfsn4-dre/romstage.c
1 file changed, 2 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/27867/1

diff --git a/src/mainboard/asus/kfsn4-dre/romstage.c b/src/mainboard/asus/kfsn4-dre/romstage.c
index 2809f0f..cc198c6 100644
--- a/src/mainboard/asus/kfsn4-dre/romstage.c
+++ b/src/mainboard/asus/kfsn4-dre/romstage.c
@@ -343,9 +343,7 @@

/* Initialize GPIO */
    /* Access SuperIO GPI03 logical device */
-	uint16_t port = GPIO3_DEV >> 8;
-	outb(0x87, port);
-	outb(0x87, port);
+	pnp_enter_conf_state(GPIO3_DEV);
    pnp_set_logical_device(GPIO3_DEV);
    /* Set GP37 (power LED) to output */
    pnp_write_config(GPIO3_DEV, 0xf0, 0x7f);
@@ -355,7 +353,7 @@
    uint8_t cr2c = pnp_read_config(GPIO3_DEV, 0x2c);
    pnp_write_config(GPIO3_DEV, 0x2c, (cr2c & 0xf3) | 0x04);
    /* Restore default SuperIO access */
-	outb(0xaa, port);
+	pnp_exit_conf_state(GPIO3_DEV);
 }

/**