[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: Select USE_LEGACY_8254_TIMER

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34709 )

Change subject: soc/intel/common: Select USE_LEGACY_8254_TIMER
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Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/34709/2/src/soc/intel/common/block/... 
File src/soc/intel/common/block/timer/Kconfig:

https://review.coreboot.org/c/coreboot/+/34709/2/src/soc/intel/common/block/... 
PS2, Line 8: default y
> making default y might break S0ix as in could see will disable 8254 static clock gating which is mus […]

+1 to what Subrata said. Setting this to 'y' is going to break behavior for all boards which did not have to do anything special until now because USE_LEGACY_8254_TIMER was always disabled by default unless PAYLOAD_SEABIOS or VGA_ROM_RUN were set. One example of this is S0ix. I am not sure if there are any other assumptions that other boards have made. In my opinion it could affect boards more than just CHROMEOS.