Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/54732 )
Change subject: Mancomb: Add firmware config CBI definitions ......................................................................
Mancomb: Add firmware config CBI definitions
The firmware config field in CBI lets us control initialization parameters based on the OEM design.
BUG=b:188713024 TEST=Build
Signed-off-by: Martin Roth martinroth@chromium.org Change-Id: I56ddc7218688919f20f41e0f143419c39d83849d --- M src/mainboard/google/mancomb/variants/mancomb/overridetree.cb 1 file changed, 27 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/54732/1
diff --git a/src/mainboard/google/mancomb/variants/mancomb/overridetree.cb b/src/mainboard/google/mancomb/variants/mancomb/overridetree.cb index ef52ac0..e76cd61 100644 --- a/src/mainboard/google/mancomb/variants/mancomb/overridetree.cb +++ b/src/mainboard/google/mancomb/variants/mancomb/overridetree.cb @@ -1,3 +1,30 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +fw_config + field WLAN 0 1 + option WLAN_WCN6856 0 + option WLAN_RTL8852 1 + end + field BEEP_MODE 2 3 + option BEEP_MODE_PIEZO 0 + option BEEP_MODE_AMP 1 + option BEEP_MODE_BIT_BANG 2 + end + field SOC_TDP 4 5 + option TDP_25_WATTS 0 + option TDP_15_WATTS 1 + option TDP_45_WATTS 2 + end + field FORMFACTOR 6 7 + option CHROMEBOX 0 + option CHROMEBASE 1 + option CHROMESTATION 2 + end + field SAT_CONNECTION 8 + option SAT_NONE 0 + option SAT_STARLINK 1 + end +end + chip soc/amd/cezanne
register "slow_ppt_limit_mW" = "37500"