[coreboot-gerrit] Change in coreboot[master]: soc/intel/appololake: Add ability to config SATA via UPD

[Mario Scheithauer (Code Review)]

Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61401 )

Change subject: soc/intel/appololake: Add ability to config SATA via UPD
......................................................................

soc/intel/appololake: Add ability to config SATA via UPD

Add a config option to disable SATA Aggressive Link Power Management.
ALPM is a method of saving power. The corresponding FSP-S UPD parameter
is enabled by default. It may be that this feature is disturbing under a
real-time system. Therefore, ALPM must be able to be disable.

Change-Id: Ica8920a87ebebe83f5d8cb4d6c8c0a6105e183e4
Signed-off-by: Mario Scheithauer 
---
M src/soc/intel/apollolake/chip.c
M src/soc/intel/apollolake/chip.h
2 files changed, 7 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/61401/1

diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 98844a5..82ec2da 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -693,6 +693,10 @@

silconfig->PavpEnable = CONFIG(PAVP);

+	/* SATA config */
+	if (is_devfn_enabled(PCH_DEVFN_SATA))
+		silconfig->SataSalpSupport = !(cfg->DisableSataSalpSupport);
+
    mainboard_silicon_init_params(silconfig);
 }

diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h
index 482b333..f531381 100644
--- a/src/soc/intel/apollolake/chip.h
+++ b/src/soc/intel/apollolake/chip.h
@@ -190,6 +190,9 @@
     * 0:Enable (default), 1:Disable.
     */
    uint8_t disable_xhci_lfps_pm;
+
+	/* SATA Aggressive Link Power Management */
+	uint8_t DisableSataSalpSupport;
 };

typedef struct soc_intel_apollolake_config config_t;