[coreboot-gerrit] Change in coreboot[master]: soc/intel/xeon_sp/cpx: add VT-d support

[Jonathan Zhang (Code Review)]

Hello build bot (Jenkins), Angel Pons, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/44280

to look at the new patch set (#4).

Change subject: soc/intel/xeon_sp/cpx: add VT-d support
......................................................................

soc/intel/xeon_sp/cpx: add VT-d support

Intel CPX-SP FSP added support for VT-d through adding UPD
parameter X2apic. Based on devicetree.cb setting, enable
VT-d programming through FSP-M.

When VT-d is enabled, add DMAR ACPI table.

Signed-off-by: Jonathan Zhang 
Change-Id: Ic66374af6e53fb847c1bdc324eb3f4e01c334a94
---
M src/soc/intel/xeon_sp/cpx/acpi.c
M src/soc/intel/xeon_sp/cpx/chip.h
M src/soc/intel/xeon_sp/cpx/romstage.c
3 files changed, 324 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/44280/4