[coreboot-gerrit] [S] Change in coreboot[master]: soc/amd/mendocino: add dxio_tx_vboost_enable for pcie optimization

[Martin L Roth (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Paul Menzel, Chris Wang, Martin Roth, Karthik Ramasubramanian, Felix Held.

Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71562 )

Change subject: soc/amd/mendocino: add dxio_tx_vboost_enable for pcie optimization
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Patch Set 2:

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/71562/comment/fbba4d2c_4172fbde 
PS2, Line 10: It will impact the PCIe signal integrity, need to double-confirm
> Please add a blank line between paragraphs or do not wrap lines too early.

Please add this rule to the style guide if you want it to be followed.  Otherwise, let's not worry about minor infringements.  Sure if it were a serious problem like having one word per line, that's reasonable, but this seems fine to me.

File src/soc/amd/mendocino/chip.h:

https://review.coreboot.org/c/coreboot/+/71562/comment/0700fdb2_1e764c44 
PS2, Line 167: w/a
> Why workaround?

Because it's a workaround of an issue we were seeing.  It's not a fix.

https://review.coreboot.org/c/coreboot/+/71562/comment/ecd06010_100f99e4 
PS2, Line 168: dxio_tx_vboost_enable
> Does *enable* need to be in the name? If yes, it’d put it in the front: `enable_dxio_tx_vboost`.

This is pretty pedantic. Let's not worry about it.