[coreboot-gerrit] Change in coreboot[master]: soc/intel/jasperlake: Add FSP UPDs for minimum assertion widths

[Aamir Bohra (Code Review)]

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43791 )

Change subject: soc/intel/jasperlake: Add FSP UPDs for minimum assertion widths
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Patch Set 6:

(3 comments)

https://review.coreboot.org/c/coreboot/+/43791/5/src/soc/intel/jasperlake/fs... 
File src/soc/intel/jasperlake/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/43791/5/src/soc/intel/jasperlake/fs... 
PS5, Line 112: asst
assrt?
can you please add a comment on what function does.

https://review.coreboot.org/c/coreboot/+/43791/5/src/soc/intel/jasperlake/fs... 
PS5, Line 135: asst
assrt? see it in other places as well.

https://review.coreboot.org/c/coreboot/+/43791/5/src/soc/intel/jasperlake/fs... 
PS5, Line 168: get_pm_pwr_cyc_dur
good to add a note here:

stretch duration programmed in the following registers:
     *  - GEN_PMCON_A.SLP_S3_MIN_ASST_WDTH (PchPmSlpS3MinAssert)
     *  - GEN_PMCON_A.S4MAW (PchPmSlpS4MinAssert)
     *  - PM_CFG.SLP_A_MIN_ASST_WDTH (PchPmSlpAMinAssert)