[coreboot-gerrit] Change in coreboot[master]: drivers/spi/tpm: Poll TPM_VALID bit until valid

[Shelley Chen (Code Review)]

Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/22370

Change subject: drivers/spi/tpm: Poll TPM_VALID bit until valid
......................................................................

drivers/spi/tpm: Poll TPM_VALID bit until valid

In case the TPM is doing a long crypto operation the initial probe
could be very delayed.  Rather than end up in recovery make the delay
long enough to accommodate the (current) long crypto times.

Mirroring changes done on i2c side in CL:756918

BUG=b:65867313
BRANCH=None
TEST=Make sure fizz boots up

Change-Id: Ie944bfb6fe33d6e9ee794439165716ab624be491
---
M src/drivers/spi/tpm/tpm.c
1 file changed, 11 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/22370/1

diff --git a/src/drivers/spi/tpm/tpm.c b/src/drivers/spi/tpm/tpm.c
index 58bf842..8d654dd 100644
--- a/src/drivers/spi/tpm/tpm.c
+++ b/src/drivers/spi/tpm/tpm.c
@@ -37,6 +37,8 @@
 #define TPM_RID_REG       (TPM_LOCALITY_0_SPI_BASE + 0xf04)
 #define TPM_FW_VER	  (TPM_LOCALITY_0_SPI_BASE + 0xf90)

+#define CR50_TIMEOUT_INIT_MS 30000 /* Very long timeout for TPM init */
+
 /* SPI slave structure for TPM device. */
 static struct spi_slave g_spi_slave CAR_GLOBAL;

@@ -342,6 +344,8 @@
 static int tpm2_claim_locality(void)
 {
    uint8_t access;
+	struct stopwatch sw;
+	long sw_run_duration = CR50_TIMEOUT_INIT_MS;

access = tpm2_read_access_reg();
    /*
@@ -353,6 +357,13 @@
    	access = tpm2_read_access_reg();
    }

+	/*
+	 * If cr50 is doing a long crypto operation, it can take up to
+	 * 30 seconds to get a valid status value back
+	 */
+	stopwatch_init_msecs_expire(&sw, sw_run_duration);
+	while (!stopwatch_expired(&sw) && access != TPM_ACCESS_VALID)
+		access = tpm2_read_access_reg();
    if (access != TPM_ACCESS_VALID) {
    	printk(BIOS_ERR, "Invalid reset status: %#x\n", access);
    	return 0;