build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/28890 )
Change subject: soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions ......................................................................
Patch Set 2:
(10 comments)
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc... File src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h:
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc... PS2, Line 592: #define GPP_I0 189 please, no space before tabs
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc... PS2, Line 593: #define GPP_I1 190 please, no space before tabs
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc... PS2, Line 594: #define GPP_I2 191 please, no space before tabs
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc... PS2, Line 595: #define GPP_I3 192 please, no space before tabs
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc... PS2, Line 596: #define GPP_I4 193 please, no space before tabs
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc... PS2, Line 597: #define GPP_I5 194 please, no space before tabs
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc... PS2, Line 598: #define GPP_I6 195 please, no space before tabs
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc... PS2, Line 599: #define GPP_I7 196 please, no space before tabs
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc... PS2, Line 600: #define GPP_I8 197 please, no space before tabs
https://review.coreboot.org/#/c/28890/2/src/soc/intel/cannonlake/include/soc... PS2, Line 601: #define GPP_I9 198 please, no space before tabs