Aamir Bohra has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37556 )
Change subject: soc/intel/tigerlake: Include soc common lpss header file ......................................................................
soc/intel/tigerlake: Include soc common lpss header file
Change-Id: I2b2c82fc7592120993bc483d3061803cf75c7335 Signed-off-by: Aamir Bohra aamir.bohra@intel.com --- M src/soc/intel/tigerlake/fsp_params.c 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/37556/1
diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c index 18985a6..c953c95 100644 --- a/src/soc/intel/tigerlake/fsp_params.c +++ b/src/soc/intel/tigerlake/fsp_params.c @@ -15,6 +15,7 @@
#include <console/console.h> #include <fsp/api.h> +#include <intelblocks/lpss.h> #include <soc/ramstage.h>
static const pci_devfn_t serial_io_dev[] = {