[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Move GPIO PM configuration to soc level

[Duncan Laurie (Code Review)]

Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37685 )

Change subject: soc/intel/cannonlake: Move GPIO PM configuration to soc level
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Patch Set 7:

(1 comment)

https://review.coreboot.org/c/coreboot/+/37685/5/src/soc/intel/cannonlake/ac... 
File src/soc/intel/cannonlake/acpi/lpit.asl:

https://review.coreboot.org/c/coreboot/+/37685/5/src/soc/intel/cannonlake/ac... 
PS5, Line 79: /* Enable GPIO PM */
            : 				_SB.PCI0.LOCL (MISCCFG_ENABLE_GPIO_PM_CONFIG)
> Sure, i will do the needful

If we think setting MISCCFG_ENABLE_GPIO_PM_CONFIG on the way into S0ix on all systems is OK then could we save the existing value in _PTS and then restore in _WAK instead of needing something in NVS?  It isn't quite as flexible but NVS is a bit of a pain..