[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block: Add cache as ram init and teardown code

[Subrata Banik (Code Review)]

Hello Aaron Durbin, Barnali Sarkar, dhaval v sharma, Balaji Manigandan, Paul Menzel, Rizwan Qureshi, build bot (Jenkins), Hannah Williams, Martin Roth,

I'd like you to reexamine a change.  Please visit

https://review.coreboot.org/18381

to look at the new patch set (#39).

Change subject: soc/intel/common/block: Add cache as ram init and teardown code
......................................................................

soc/intel/common/block: Add cache as ram init and teardown code

Create sample model for common car init and teardown programming.

TEST=Booted Reef, KCRD/EVE, GLKRVP with CAR_CQOS, CAR_NEM_ENHANCED
and CAR_NEM configs till post code 0x2a.

Change-Id: Iffd0c3e3ca81a3d283d5f1da115222a222e6b157
Signed-off-by: Subrata Banik 
---
M src/drivers/intel/fsp1_1/after_raminit.S
A src/soc/intel/common/block/cpu/Kconfig
A src/soc/intel/common/block/cpu/Makefile.inc
A src/soc/intel/common/block/cpu/car/cache_as_ram.S
A src/soc/intel/common/block/cpu/car/exit_car.S
M src/soc/intel/skylake/Kconfig
M src/soc/intel/skylake/Makefile.inc
D src/soc/intel/skylake/bootblock/cache_as_ram.S
D src/soc/intel/skylake/include/soc/car_teardown.S
M src/soc/intel/skylake/romstage/car_stage_fsp20.S
10 files changed, 601 insertions(+), 341 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/18381/39