1 Sep
2020
1 Sep
'20
7:48 p.m.
Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45012 )
Change subject: soc/intel/common: Add SMRR Lock Supported bit definition for MTRR_CAP ......................................................................
Patch Set 2: Code-Review+2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I1254fb40c790f2a83dd11c2aabcf9bdf922b9395
Gerrit-Change-Number: 45012
Gerrit-PatchSet: 2
Gerrit-Owner: Tim Wawrzynczak twawrzynczak@chromium.org
Gerrit-Reviewer: Caveh Jalali caveh@chromium.org
Gerrit-Reviewer: Furquan Shaikh furquan@google.com
Gerrit-Reviewer: Kane Chen kane.chen@intel.com
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Subrata Banik subrata.banik@intel.com
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-Comment-Date: Tue, 01 Sep 2020 22:48:48 +0000
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