[coreboot-gerrit] Change in coreboot[master]: cpu/x86: Cache stages for RESET_VECTOR_IN_RAM

[Arthur Heymans (Code Review)]

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38728 )

Change subject: cpu/x86: Cache stages for RESET_VECTOR_IN_RAM
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Patch Set 1: Code-Review+1

(1 comment)

https://review.coreboot.org/c/coreboot/+/38728/1/src/cpu/x86/mtrr/nonxip_cac... 
File src/cpu/x86/mtrr/nonxip_cache.c:

https://review.coreboot.org/c/coreboot/+/38728/1/src/cpu/x86/mtrr/nonxip_cac... 
PS1, Line 65: MTRR_TYPE_WRBACK
Is this not pretty much the same as in cpu/x86/mtrr/xip_cache.c except for having no upper limit for size and also the type of the MTRR? Could the code be made common?