Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44897 )
Change subject: Revert "soc/amd/acpi: Move ACPI IVRS generation to coreboot" ......................................................................
Patch Set 4:
Patch Set 4:
I was able to reproduce locally over the weekend. I had added an entry for a second IOAPIC on the IOHC, based on the PPRs, but there is not a second device in the MADT. It is looking like that is what is leading to the hang. When i remove the second entry, i'm able to fully boot without amd_iommu=off kernel param. I have a few more experiments to run today, but would like to submit a follow up patch to remove the second IVRS entry. I need to firm up some things from the PPR as well.
It would be good to also test with `amd_iommu=off` since the current hang is seen with both IOMMU enabled and disabled. Do you have an ETA on when you will have all the required changes pushed?