[coreboot-gerrit] [S] Change in coreboot[main]: soc/mediatek/commmon: Set mcupm mcufw_reserved region to non-cacheable

[Matt DeVillier (Code Review)]

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86159?usp=email )

Change subject: soc/mediatek/commmon: Set mcupm mcufw_reserved region to non-cacheable
......................................................................

soc/mediatek/commmon: Set mcupm mcufw_reserved region to non-cacheable

Set mcufw_reserved region to non-cacheable and remove cache operation in
dvfs.c.

TEST=Build pass, boot ok.
Check MMU List by CVD (Codeviser):
0x00113000--0x00123FFF  = I:non-cacheable O:non-cacheable
BUG=b:390334489

Change-Id: I886effd59006e5ad4bfe5bdbc14f057520304835
Signed-off-by: Jarried Lin 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86159
Reviewed-by: Yu-Ping Wu 
Tested-by: build bot (Jenkins) 
Reviewed-by: Yidi Lin 
---
M src/soc/mediatek/common/include/soc/symbols.h
M src/soc/mediatek/common/mmu_operations.c
M src/soc/mediatek/mt8196/dvfs.c
3 files changed, 7 insertions(+), 3 deletions(-)

Approvals:
  Yu-Ping Wu: Looks good to me, approved
  Yidi Lin: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/src/soc/mediatek/common/include/soc/symbols.h b/src/soc/mediatek/common/include/soc/symbols.h
index f33d19a..3391467 100644
--- a/src/soc/mediatek/common/include/soc/symbols.h
+++ b/src/soc/mediatek/common/include/soc/symbols.h
@@ -9,6 +9,6 @@
 DECLARE_REGION(resv_mem_optee)
 DECLARE_REGION(resv_mem_gpu)
 DECLARE_REGION(resv_mem_gpueb)
-DECLARE_REGION(mcufw_reserved)
+DECLARE_OPTIONAL_REGION(mcufw_reserved)

#endif /* _SOC_MEDIATEK_COMMON_SYMBOLS_H_ */
diff --git a/src/soc/mediatek/common/mmu_operations.c b/src/soc/mediatek/common/mmu_operations.c
index be216f6..5471af2 100644
--- a/src/soc/mediatek/common/mmu_operations.c
+++ b/src/soc/mediatek/common/mmu_operations.c
@@ -4,6 +4,7 @@
 #include <symbols.h>
 #include <soc/emi.h>
 #include <soc/mmu_operations.h>
+#include <soc/symbols.h>

__weak void mtk_soc_after_dram(void) { /* do nothing */ }

@@ -35,6 +36,11 @@
    mmu_config_range(_dma_coherent, REGION_SIZE(dma_coherent),
    		 SECURE_UNCACHED_MEM);

+	/* Set mcufw_reserved to non-cacheable */
+	if (REGION_SIZE(mcufw_reserved) != 0)
+		mmu_config_range(_mcufw_reserved, REGION_SIZE(mcufw_reserved),
+				 SECURE_UNCACHED_MEM);
+
    mmu_enable();
 }

diff --git a/src/soc/mediatek/mt8196/dvfs.c b/src/soc/mediatek/mt8196/dvfs.c
index da0fdaa..255f95e 100644
--- a/src/soc/mediatek/mt8196/dvfs.c
+++ b/src/soc/mediatek/mt8196/dvfs.c
@@ -12,6 +12,4 @@

write32p(CSRAM_BASE + 0x8, 0x55AA55AA);
    write32p(CSRAM_BASE + 0xC, val);
-
-	dcache_clean_invalidate_by_mva((void *)CSRAM_BASE, CACHE_LINE);
 }