Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/50495 )
Change subject: soc/amd/picasso/fch: remove comment about ForceStpClkRetry ......................................................................
soc/amd/picasso/fch: remove comment about ForceStpClkRetry
The corresponding bit is marked as reserved in the PPR. Also there's no BKDG for Picasso any more; the BKDG was mostly replaced by the PPR. Also fix the style of the comment.
Change-Id: Iffdbb9e951cb140e4352ab0f198f72a71ba798dc Signed-off-by: Felix Held felix-coreboot@felixheld.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/50495 Reviewed-by: Raul Rangel rrangel@chromium.org Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/amd/picasso/fch.c 1 file changed, 1 insertion(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Marshall Dawson: Looks good to me, approved Raul Rangel: Looks good to me, approved
diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c index 5d62e8e..e52090a 100644 --- a/src/soc/amd/picasso/fch.c +++ b/src/soc/amd/picasso/fch.c @@ -135,9 +135,7 @@ configure_smi(SMITYPE_SMI_CMD_PORT, SMI_MODE_SMI);
/* SMI on SlpTyp requires sending SMI before completion - * response of the I/O write. The BKDG also specifies - * clearing ForceStpClkRetry for SMI trapping. - */ + response of the I/O write. */ reg = pm_read32(PM_PCI_CTRL); reg |= FORCE_SLPSTATE_RETRY; pm_write32(PM_PCI_CTRL, reg);