Uwe Poeche has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34173 )
Change subject: siemens/mc_bdx1: increase SPI-flash erase timeout ......................................................................
siemens/mc_bdx1: increase SPI-flash erase timeout
This patch provides an increased timeout (60ms ->200ms) for SPI HW-sequencing flash erase operations. Without that the erase for MRC cache writing on siemens/mc_bdx1 sometimes goes wrong because the timeout stops waiting for flash cycle completion. It was found during continuous integration. Investigation showed that the used flash type takes sporadic (e.g.5% of the test cycles) more time for completion of erasing operation if the ambient temperature increases. The measured time values are in range of data sheet of SPI flash. 60ms is a typical value. So increasing the value is necessary.
tested on siemens/bdx1; measured time values with increased ambient temperature of flash were always smaller than worst case value of 200ms.
Change-Id: Id50636f9ed834ffd7810946798b300e58b2c14d2 Signed-off-by: Uwe Poeche uwe.poeche@siemens.com --- M src/southbridge/intel/common/spi.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/34173/1
diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index 8430dc8..e3ba53d 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -727,7 +727,7 @@ u32 start, end, erase_size; int ret; uint16_t hsfc; - uint16_t timeout = 1000 * 60; + uint32_t timeout = 1000 * 200;
erase_size = flash->sector_size; if (offset % erase_size || len % erase_size) {