[coreboot-gerrit] Change in coreboot[master]: src/vendorcode/intel/fsp/fsp2_0/cpx-sp: add prev boot error info HOB ...

[Jonathan Zhang (Code Review)]

Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44973 )

Change subject: src/vendorcode/intel/fsp/fsp2_0/cpx-sp: add prev boot error info HOB header file
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Patch Set 2:

(3 comments)

Thanks!

https://review.coreboot.org/c/coreboot/+/44973/2/src/vendorcode/intel/fsp/fs... 
File src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_prevbooterr.h:

https://review.coreboot.org/c/coreboot/+/44973/2/src/vendorcode/intel/fsp/fs... 
PS2, Line 2: BR
> Remove?

The code under vendorcode directory is from vendors as-is, so it does not subject to coreboot coding standard.

https://review.coreboot.org/c/coreboot/+/44973/2/src/vendorcode/intel/fsp/fs... 
PS2, Line 42: UINT16  Length;    // Actual size of the error sources  used in the HOB
            : UINT8  HobData[PREV_BOOT_ERR_SRC_HOB_SIZE -2];  // List of Error source structures of format //MCBANK_ERR_INFO  or CSR_ERR_INFO
> indent?

This is copy & pasted from Intel as-is.

https://review.coreboot.org/c/coreboot/+/44973/2/src/vendorcode/intel/fsp/fs... 
PS2, Line 47: UINT8  Type;    // McBankType = 1;
            : UINT8  Segment;
            : UINT8  Socket;
            : UINT16  ApicId;    // ApicId  is Needed only if it a core McBank.
            : UINT16  McBankNum;
            : UINT64  McBankStatus;
            : UINT64  McbankAddr;
            : UINT64  McBankMisc;
> indent?

This is copy & pasted from Intel as-is.