Felix Held has submitted this change and it was merged. ( https://review.coreboot.org/27712 )
Change subject: nb/intel/sandybridge: Bump MRC_CACHE_VERSION ......................................................................
nb/intel/sandybridge: Bump MRC_CACHE_VERSION
Commit 74203de "intel/sandybridge: Don't hardcode platform type" changed the MRC layout.
Bump the version to prevent a boot error, if the cache isn't cleared on flashing a new coreboot version.
Change-Id: Icd6f31bf0b30a42c66e18ab83d2434f9c3084211 Signed-off-by: Patrick Rudolph siro@das-labor.org Reviewed-on: https://review.coreboot.org/27712 Reviewed-by: Arthur Heymans arthur@aheymans.xyz Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/northbridge/intel/sandybridge/raminit.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 47474ee..31c7d5b 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -36,7 +36,7 @@ #include "raminit_common.h" #include "sandybridge.h"
-#define MRC_CACHE_VERSION 0 +#define MRC_CACHE_VERSION 1
/* FIXME: no ECC support. */ /* FIXME: no support for 3-channel chipsets. */