[coreboot-gerrit] Change in coreboot[master]: soc/intel/cnl: lock AES-NI feature if selected

[Nico Huber (Code Review)]

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46273 )

Change subject: soc/intel/cnl: lock AES-NI feature if selected
......................................................................

soc/intel/cnl: lock AES-NI feature if selected

Lock AES-NI (MSR_FEATURE_CONFIG) to prevent unintended changes of
AES-NI enablement as precaution, as suggested in Intel document
325384-070US.

Locking is enabled by default (as already done in SKL and Arrandale) and
may be disabled by the newly introduced Kconfig in the parent change.

Tested by checking the MSR.

Change-Id: I79495bfbd3ebf3b712ce9ecf2040cecfd954178d
Signed-off-by: Michael Niewöhner 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46273
Tested-by: build bot (Jenkins) 
Reviewed-by: Tim Wawrzynczak 
Reviewed-by: Nico Huber 
---
M src/soc/intel/cannonlake/cpu.c
1 file changed, 2 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, approved
  Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/soc/intel/cannonlake/cpu.c b/src/soc/intel/cannonlake/cpu.c
index 3d97c56..ddedb3f 100644
--- a/src/soc/intel/cannonlake/cpu.c
+++ b/src/soc/intel/cannonlake/cpu.c
@@ -199,6 +199,8 @@
    /* Configure Intel Speed Shift */
    configure_isst();

+	set_aesni_lock();
+
    /* Enable ACPI Timer Emulation via MSR 0x121 */
    enable_pm_timer_emulation();