Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61451 )
Change subject: soc/intel/cannonlake: Use SBI msg to disable HECI1 ......................................................................
soc/intel/cannonlake: Use SBI msg to disable HECI1
Select HECI_DISABLE_USING_SMM config for Cannon Lake to disable HECI1 device using the SBI msg in SMM.
BUG=none TEST=None
Signed-off-by: Subrata Banik subratabanik@google.com Change-Id: I6882b619506d1bf4131f68c2c9a32ef4f7d6f6d7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61451 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/smihandler.c 2 files changed, 2 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 4a084a3..f85cd15 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -109,6 +109,7 @@
config DISABLE_HECI1_AT_PRE_BOOT default y if MAINBOARD_HAS_CHROMEOS + select HECI_DISABLE_USING_SMM
config MAX_CPUS int diff --git a/src/soc/intel/cannonlake/smihandler.c b/src/soc/intel/cannonlake/smihandler.c index ac25990..88b58e8 100644 --- a/src/soc/intel/cannonlake/smihandler.c +++ b/src/soc/intel/cannonlake/smihandler.c @@ -16,7 +16,7 @@ */ void smihandler_soc_at_finalize(void) { - if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT) && CONFIG(HECI_DISABLE_USING_SMM)) + if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT)) heci1_disable(); }
5 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one.