[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: lock TCO base address on pch finalize

[Michael Niewöhner (Code Review)]

Michael Niewöhner has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35525 )

Change subject: soc/intel/skylake: lock TCO base address on pch finalize
......................................................................

soc/intel/skylake: lock TCO base address on pch finalize

This is a follow-up on I5bd95b3580adc0f4cffa667f8979b7cf08925720 which
already locks TCO itself but does not lock the base address.

Signed-off-by: Michael Niewöhner 
Change-Id: Idab9419487e6e4cbdecd2efaa4772ff4960c9055
---
M src/soc/intel/common/block/smbus/tco.c
1 file changed, 6 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/35525/1

diff --git a/src/soc/intel/common/block/smbus/tco.c b/src/soc/intel/common/block/smbus/tco.c
index 1a215eb..a3ebe24 100644
--- a/src/soc/intel/common/block/smbus/tco.c
+++ b/src/soc/intel/common/block/smbus/tco.c
@@ -34,6 +34,7 @@
 #define TCOBASE		0x50
 #define TCOCTL		0x54
 #define  TCO_BASE_EN		(1 << 8)
+#define  TCO_BASE_LOCK		(1 << 0)

/* Get base address of TCO I/O registers. */
 static uint16_t tco_get_bar(void)
@@ -61,8 +62,13 @@

void tco_lockdown(void)
 {
+	uint32_t reg32;
    uint16_t tcocnt;

+	/* TCO base address lockdown */
+	reg32 = pci_read_config32(dev, TCOCTL);
+	pci_write_config32(dev, TCOCTL, reg32 | TCO_BASE_LOCK);
+
    /* TCO Lock down */
    tcocnt = tco_read_reg(TCO1_CNT);
    tcocnt |= TCO_LOCK;