Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36250 )
Change subject: mainboard/google: Rework Hatch so that SPD in CBFS is optional ......................................................................
Patch Set 2:
Patch Set 2:
There is also this change to make SPDs optional in CBFS: https://review.coreboot.org/c/coreboot/+/36068
From inspection I don't think that is actually workable in its current form. variant boards are assumed to define GPIO straps that wouldn't exist for a smbus romstage type board. Frankly there is too much love of pre-processor going on and it makes a tangled mess for no apparent value. The weak symbols only make it worse by making runtime fragile as well as compile time.
I would strongly suggest we make a split between romstages that are appropriate for each path instead of trying to conflate them and hack around with ifdefs. The former solution is simple and robust.